1. Overview Wafer-Scale Integration (WSI) is not an original concept of Cerebras. In 1980, Gene Amdahl, the father of the IBM mainframe, founded Trilogy Systems, attempting to manufacture an entire wafer as a single processor. Trilogy raised $230 million from entities including IBM and Sperry Rand — the largest startup financing in Silicon Valley history at the time — but during prototype testing, the entire wafer short-circuited upon power-up and burned to a dim red glow, metal wiring layers delaminated, and the thermal solution failed completely. Combined with a devastating fab flood and the sudden death of the company president, along with Amdahl himself being seriously injured in a car accident, Trilogy ended in total failure five years after its founding. In the same period, Texas Instruments, ITT, and the U.S. National Security Agency (NSA) all attempted the WSI route, but the shared conclusion was: manufacturing a commercial wafer-scale chip would require 99.99% fabrication yield — something considered impossible to achieve for at least 100 years at the time. ...

1. Overview High Bandwidth Memory (HBM) is a computer memory interface technology for 3D-stacked synchronous dynamic random-access memory (SDRAM), jointly developed by Samsung, AMD, and SK Hynix. In October 2013, HBM was adopted as an industry standard (JESD235) by JEDEC. The technology vertically stacks multiple DRAM dies, using Through-Silicon Vias (TSVs) and microbumps to achieve inter-layer interconnection, and is then tightly coupled with a GPU or accelerator via a silicon interposer, thereby delivering data transfer bandwidth tens of times greater than traditional DDR/GDDR solutions with far smaller volume and lower power consumption. ...

NVIDIA SXM 1. SXM Overview SXM stands for Server PCI Express Module, which is NVIDIA’s proprietary high-bandwidth GPU socket/connector solution designed for mounting data-center-class GPU accelerators directly onto server motherboards. Core Design Philosophy Proprietary: SXM is NVIDIA’s closed proprietary interface standard with undisclosed specifications (requires NDA, Non-Disclosure Agreement), giving NVIDIA complete design freedom High Bandwidth: Direct GPU-to-GPU interconnection via NVLink, with bandwidth far exceeding PCIe High Power: Not limited by the PCIe standard 75W/300W limits; directly powered through the socket up to 700W-1400W+ ...

Architecture Compute CUDA Version Representative chip architecture GPU Blackwell 10.0 sm_100 B100/B200 GB200, B200, B100 Hopper 9.0 sm_90 GH100 H100, H800, H200 Ada Lovelace 8.9 sm_89 AD10x RTX 4090, 4080, 4070 Ampere 8.6 sm_86 GA102/104 RTX 3090, 3080, 3070 Ampere 8.0 sm_80 GA100 A100, A30 Turing 7.5 sm_75 TU10x/T4 RTX 2080, T4, Quadro RTX Volta 7.0 sm_70 GV100 V100, Titan V Pascal 6.1/6.0 sm_61/60 GP10x/100 GTX 1080, P100, P4 Maxwell 5.2/5.0 sm_52/50 GM20x/204 GTX 980, M40, M60 Kepler 3.5/3.0 sm_35/30 GK110/104 GTX 780, K40, K80 Fermi 2.1/2.0 sm_21/20 GF104 114 116/GF100 110 GTX 580, GTX 560 Ti, GTX 460 GTX 480, GTX 470, Tesla M2050/M2090